Wilder Technologies SATA 2.5 Test Adapter Bedienungsanleitung

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Inhaltsverzeichnis

Seite 1 - John Calvin

High performance storage systems technology update and introduction to 12G physical layer validationJohn Calvin

Seite 2 -  Introduction

Tektronix Technology Innovation Forum Spring 2012 High performance Storage UpdateSATA uBGA SSD’s present unique test challengesuBGA based test conf

Seite 3

Tektronix Technology Innovation Forum Spring 2012 High performance Storage UpdatePCIePCIe is multi-lane  scalable–1 to 16 lanesPCIe (Gen3) each

Seite 4

Tektronix Technology Innovation Forum Spring 2012 High performance Storage UpdatePCBPCIe Conn.PCIe/SATA Conn.PCBAccept only a x2 PCIe, or a x1 PCIe

Seite 5 - It’s the measurements

Tektronix Technology Innovation Forum Spring 2012 High performance Storage UpdateDesktop Cables ConceptPCIe CableExisting SATA CablePCIe CablePCBPC

Seite 6 - Methodology

Tektronix Technology Innovation Forum Spring 2012 High performance Storage UpdateFundamentals of 12G SAS characterization14

Seite 7 - Methodology (cont)

Tektronix Technology Innovation Forum Spring 2012 High performance Storage Update12+G Design Problem:1000mV, FFE, Crosstalk, Crosstalk, Crosstalk,

Seite 8 - The SATA Ecosystem: Now

Tektronix Technology Innovation Forum Spring 2012 High performance Storage Update12G Design Problem:FFE, DFE A non-recursive DFE can only compensa

Seite 9

Link Analysis in the context of SAS-12G SAS 12 (Passive Link) Tx Rx Compliance Points. (Source 11-416r3) SAS 12 (Active Link) Active Driver and Rec

Seite 10

Compliance Points Descriptions A TxRx connection is the complete simplex signal path between the transmitter circuit and the receiver circuit IT and

Seite 11 - It is already available

SDLA channel de-convolution and de-embedding Given a good set of channel S-Parameters, a clear model of SAS TC can be obtained for jitter and AC para

Seite 12 - Desktop Connector Concept

Tektronix Technology Innovation Forum Spring 2012 High performance Storage UpdateAgenda: High performance storage systems technology update and int

Seite 13 - Desktop Cables Concept

Another.. Better way? A brief treatise on the “PMC or SAS-3 Eye” Considered as a replacement for WDP Method: PMC (11-416r2 section X, 5.7.5.7.3)–

Seite 14

SAS-3 brings an advanced set of crosstalk models into the channel evaluation and simulation process. Tektronix Technology Innovation Forum Spring 2

Seite 15 - 12+G Design Problem:

SAS-3 Eye integrated into Scope’s MATLAB servicesTektronix Technology Innovation Forum Spring 201222

Seite 16 - FFE, DFE

Tektronix Technology Innovation Forum Spring 2012Preliminary SAS-3 Tx PreC, PostC Requirements23 High performance Storage Update

Seite 17 - (Source 11-416r3)

Tektronix Technology Innovation Forum Spring 201224SPL-2 Transmitter Training (11-036r9)Transmission Training Information Unit (TTIU) SPL-2 introdu

Seite 18

Jitter Analysis AdvancesBUJ and relevance to multilane topologies25 Interconnect and board layout technology is advancing and the greatest area of fo

Seite 19

Tektronix Technology Innovation Forum Spring 201226SAS-3 (r00) Specs The Jitter and AC parametric measurements currently in the draft SAS-12G spec

Seite 20

Tektronix Technology Innovation Forum Spring 2012 High performance Storage UpdatePreliminary SAS-3 JTF RequirementsReference T10/11-221r4 R027

Seite 21

Tektronix Technology Innovation Forum Spring 201228 Classification of Rj and BUJ requires deep analysis into the lower probability regions of the c

Seite 22

ComprehensiveJitter Mapping tools 29 Tektronix Technology Innovation Forum Spring 2012

Seite 23

Tektronix Technology Innovation Forum Spring 2012Storage Timelines and Solutions DevelopmentToday2008 2009 2010 2011Gen 3- Silicon Phase6G Integrati

Seite 24

Tektronix Technology Innovation Forum Spring 201230 DPOJET applies straight-line fits on the Q scale of the combined Rj and NPJ CDF. The extent to

Seite 25

Tektronix Technology Innovation Forum Spring 201231Pure RjRj + BUJ

Seite 26 - SAS-3 (r00) Specs

Tektronix Technology Innovation Forum Spring 2012 32BUJ on a 110011 (New BUJ Model –vs- Legacy).

Seite 27 - Reference T10/11-221r4 R0

Tektronix Technology Innovation Forum Spring 201233BUJ on a JTPAT (New BUJ Model –vs- Legacy).

Seite 28 - Jitter Measurements

 The Tektronix DSA7(33/25)04D Real Time Oscilloscope family offers the following interconnect specs.  2 Channel 100Gs/sec Sample rate at 33 GHz ana

Seite 29 - Jitter Mapping tools

SAS-3 Spec R00 BW RequirementsTektronix Technology Innovation Forum Spring 201235

Seite 30 - Jitter Analysis

Bandwidth ConsiderationsSAS PRBS11 12G NRZ Power Spectrum High performance Storage UpdateTektronix Technology Innovation Forum Spring 201236

Seite 31

Bandwidth ConsiderationsSignal Acquisition and bit rate harmonicsHigh performance Storage UpdateTektronix Technology Innovation Forum Spring 201237

Seite 32

Tektronix Technology Innovation Forum Spring 2012 High performance Storage Update3838Receiver Testing made easyHow the Family Fits TogetherDevice U

Seite 33

Tektronix Technology Innovation Forum Spring 2012 High performance Storage Update39Stressed Voltage Eye CalibrationStressed Pattern GeneratorAnalyz

Seite 34 - Channel Count Considerations

Tektronix Technology Innovation Forum Spring 2012 High performance Storage UpdateSATA 3.1/ UTD 1.4.3 Spec Revisions4

Seite 35

Tektronix Technology Innovation Forum Spring 2012 High performance Storage Update40Stressed Voltage EyeStressed Pattern GenerationAnalyzerBERTScope

Seite 36 - Bandwidth Considerations

Tektronix Technology Innovation Forum Spring 201241Rx Results (BertScope)DATAT-MHz T-SJ SJ Bits Errors BER Status ThreshVX DelayPS2 0.1 4.52 6E+08 0

Seite 37

Tektronix Technology Innovation Forum Spring 201242Automated Tx Results (TekExpress full Auto)Test NameTest 5.2.1-TX SSC Modulation TypeTest 5.2.2-T

Seite 38 - Receiver Testing made easy

Waveform Distortion Penalty  Waveform Distortion Penalty (WDP/TWDP): Is a measurement method deployed in the SAS-2 spec. It uses acquired data aga

Seite 39 - Analyzer

SAS/SATA Interconnect SolutionsTektronix Technology Innovation Forum Spring 201244Tektronix and Wilder Technologies have collaborated and jointly en

Seite 40 - Stressed Pattern Generation

Mini-SAS HD Plug Test Adapter (right-hand)Top ViewsHigh-PerformanceMini-SAS HD Plug Connector Configuration16 SMAs forHigh-Speed Testing8 Position Low

Seite 41 - Rx Results (BertScope)

Tektronix Technology Innovation Forum Spring 2012 46

Seite 42

12G SAS Instrument Solution Strategy Phase 0 (Silicon Designers): Transition into Phase 1 in November 2011 – Equivalent Time Instrument: ICR, BER C

Seite 43 - Waveform Distortion Penalty

Integrated and Automated Test ControlTekExpress™ Test Automation FrameworkTekExpress Instrument Topology for TSG/PHY/OOB, RSG testing Complete offeri

Seite 44

Tektronix Technology Innovation Forum Spring 2012Complete Tektronix 12G Instrument PortfolioReceiver Tests/Active Cable TestsRSG/RMT- Receiver Sili

Seite 45 - Top Views

Tektronix Technology Innovation Forum Spring 2012 High performance Storage UpdateIt’s the measurements ..SATA UTD 1.4.3 Test RequirementsPhy Trans

Seite 46

Tektronix Technology Innovation Forum Spring 2012 High performance Storage UpdateEnabling Innovation in the Digital Age50

Seite 47

Tektronix Technology Innovation Forum Spring 2012 High performance Storage UpdateSATA ECN 50: Asymmetric Amplitude and Measurement Methodology• Hos

Seite 48 - – Signal generators

Tektronix Technology Innovation Forum Spring 2012 High performance Storage UpdateSATA ECN 50: Asymmetric Amplitude and Measurement Methodology (con

Seite 49 - PHY, TSG, and OOB Tests

Tektronix Technology Innovation Forum Spring 2012 High performance Storage UpdateEmbeddedApplicationsSATA BGAToday, SATA is expanding in specialize

Seite 50

Tektronix Technology Innovation Forum Spring 2012 High performance Storage UpdateSATA uBGA SSD’s present unique test challengesNew SSD’s approved b

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